DASIP 2026: Workshop on Design and Architectures for Signal and Image Processing
In conjunction with the HiPEAC 2026 Conference in Kraków, Poland, January 26-28, 2026
Call for Papers Conference Proceeding (TBA)

About DASIP

The Workshop on Design and Architectures for Signal and Image Processing (DASIP) provides an inspiring international forum for the latest innovations and developments in the field of leading signal, image and video processing and machine learning in custom embedded, edge and cloud computing architectures and systems.

The workshop program will include keynote speeches and contributed paper sessions.

The DASIP 2026 proceedings will be published. Publisher will be announced soon.

Selected papers of DASIP 2026 will be invited to submit an extended version of their work to Elsevier's Journal of Systems Architecture (JSA).

 

Venue

The 19th Workshop on Design and Architectures for Signal and Image Processing (DASIP 2026) will take place in conjunction with the
HiPEAC 2026 conference in Krakow, Poland, January 26 - 28, 2026.

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Important Dates

Preliminary Cycle
Abstract submission deadline: September 15, 2025
Paper submission deadline: September 19, 2025
Notification and feedbacks: October 24, 2025

Main Cycle
Abstract submission deadline: November 10, 2025
Paper submission deadline: November 17, 2025
Notification of acceptance: December 19, 2025
Camera ready submission deadline: January 17, 2026

All deadlines are in Anywhere on Earth (AoE)

Call for Papers

Prospective authors are invited to submit manuscripts on the following topics, but not limited to them.

Custom embedded, edge and cloud architectures and systems

Machine learning and deep learning architectures for inference and training
Systems for autonomous vehicles: cars, drones, ships and space applications
Image processing and compression architectures
Smart cameras, security systems, behaviour recognition
Edge and cloud processing: special routing, configurable coprocessors and low energy considerations
Real-time cryptography, secure computing, financial and personal data processing
Computer arithmetic, approximate computing, probabilistic computing, nanocomputing, bio-inspired computing
Biological data collection and analysis, bioinformatics
Personal digital assistants, natural language processing, wearable computing and implantable devices
Global navigation satellite and inertial navigation systems

Design Methods and Tools

Design verification and fault tolerance
Embedded system security and security validation
System-level design and hardware/software co-design
High-level synthesis, logic synthesis, communication synthesis
Embedded real-time systems and real-time operating systems
Rapid system prototyping, performance analysis and estimation
Formal models, transformations, algorithm transformations and metrics

Development Platforms, Architectures and Technologies

Embedded platforms for multimedia and telecommunication
Many-core and multi-processor systems, SoCs, and NoCs
Reconfigurable ASIPs, FPGAs, and dynamically reconfigurable systems
Memory system and cache management
Asynchronous (self-timed) circuits and analog and mixed-signal circuits

Authors Information

Two-cycle Submission Process

Two submission deadlines are proposed: One for the preliminary cycle, and one for the main cycle.
Papers must follow the same subsequently described submission guidelines for both cycles.
However, papers rejected in the preliminary cycle can be resubmitted during the main cycle, allowing authors to take advantage of the reviews.
Acceptance in the preliminary cycle result in automatic acceptance in the main cycle, no more action required.

Submission Guidelines

Authors should prepare their full papers (up to 12 pages) or short papers (up to 6 pages, intended for work-in-progress with promising results or from students at the early stages of their research) in the single-column Springer LNCS format. The Instructions for Proceedings Authors and the Springer LNCS template in various formats are available through the following link:
https://www.springer.com/gp/computer-science/lncs/conference-proceedings-guidelines
The Springer’s proceedings LaTeX templates are also available in Overleaf.

Submitted papers are required to describe original unpublished work and must not be under consideration for publication elsewhere. Submissions must be fully anonymous, but authors should not hide previous work, instead, they need to make self-references in the third person.

Each submission will receive at least three independent double-blind reviews from the members of the scientific committee. Authors are encouraged to take the reviewers’ comments into account when preparing the final versions of their papers and present the research during the workshop.

All accepted papers must be presented by one of the authors in order to be included in the workshop proceedings.

Paper Submission

The submission of papers is done via HotCRP. Please submit your paper through the following link:
https://dasip26-hotcrp.univ-ubs.fr/.

Registration

DASIP 2026 is a HiPEAC-based workshop. Hence, a registration at HiPEAC is required.

Please be aware that for each accepted paper, at least one of the authors must pay the full registration fee in order for the paper to be included in the workshop proceedings and scheduled in the program.

Distinguished Speakers

Program

Committees

Chairs

Marcin Kowalczyk
AGH University of Kraków,
Kraków, Poland
kowalczyk@agh.edu.pl

Camille Monière
Université Bretagne Sud - Lab-STICC UMR 6285,
Lorient, France
camille.moniere@univ-ubs.fr

Steering Committee

Alfonso Rodríguez
Universidad Politécnica de Madrid, Madrid, Spain

Andrea Pinna
Sorbonne University, Paris, France

Diana Goehringer
TU Dresden, Dresden, Germany

Jean-Pierre David
Ecole Polytechnique de Montreal, Montreal, Canada

João M. P. Cardoso
University of Porto, Porto, Portugal

Karol Desnos
INSA Rennes - IETR laboratory, Rennes, France

Marek Gorgoń
AGH University of Science and Technology, Kraków, Poland

Michael Huebner
Brandenburg University of Technology, Cottbus-Senftenberg, Germany

Miguel Chavarrías
Universidad Politécnica de Madrid, Madrid, Spain

Paolo Meloni
University of Cagliari, Cagliari, Italy

Sebastien Pillement
University of Nantes - IETR, Nantes, France

Sergio Petruz
TU Dresden, Dresden, Germany

Tomasz Kryjak
AGH University of Science and Technology, Kraków, Poland

Technical Program Committee

Andrea Pinna
Sorbonne Univeristy, France

Andrés Otero
Universidad Politécnica de Madrid, Spain

Arnaldo Oliveira
Universidade de Aveiro - DETI / Instituto de Telecomunicações, Portugal

Bertrand Granado
Sorbonne Université, France

Christian Pilato
Politecnico di Milano, Italy

Christopher Claus
Robert Bosch GmbH,

Daniel Chillet
IRISA/ENSSAT University of Rennes 1, France

Diana Goehringer
TU Dresden, Germany

Dimitrios Soudris
National Technical University of Athens, Greece

Eduardo de La Torre
Universidad Politécnica de Madrid, Spain

Francesca Palumbo
Information Eng. Unit - PolComIng - University of Sassari, Italy

Frank Hannig
Friedrich-Alexander University Erlangen-Nürnberg, Germany

Gabriel Caffarena
University CEU San Pablo, Spain

Gustavo Marrero Callico
Universidad de Las Palmas de Gran Canaria, Spain

Guy Gogniat
Université de Bretagne Sud - UEB, France

Jean Francois Nezan
INSA Rennes, IETR laboratory, France

Jean Pierre David
Ecole Polytechnique de Montréal,

Joao Cardoso
University of Porto, Portugal

João Canas Ferreira
University of Porto, Portugal

Jorge Portilla
Universidad Politécnica de Madrid, Spain

Kevin J. M. Martin
Lab-STICC - Université de Bretagne-Sud,

Marek Gorgon
AGH University of Science and Technology, Poland

Martin Danek
Daiteq s.r.o., Czechia

Mateusz Komorkiewicz
IEEE, Poland

Maxime Pelcat
IETR/INSA, France

Milos Drutarovsky
Technical University of Kosice, Slovak Republic

Nuno Roma
Universidade de Lisboa, Portugal

Olivier Romain
University of Cergy Pontoise, France

Oscar Gustafsson
Linköping University, Sweden

Paolo Meloni
University of Cagliari, Italy

Ruben Salvador
CentraleSupélec - IETR, France

Sebastien Pillement
University of Nantes - IETR, France

Tomasz Kryjak
AGH University of Science and Technology, Poland

Yannick Le Moullec
Tallinn University of Technology, Estonia

Francesco Ratto
Università degli Studi di Cagliari, Italy

Claudio Rubattu
University of Sassari, Italy

Georgios Zervakis
University of Patras, Greece

Prior Editions

DASIP is a long-running annual workshop open to the presentation and discussion of the latest innovations and developments in the field of leading signal, image and video processing and machine learning in custom embedded, edge and cloud computing architectures and systems.

It was organized for the first time in 2007 in Grenoble, France, and since then it has alternated between several countries in Europe and Canada. The last five editions were co-located with HiPEAC.


  • spanish flag

    DASIP 2025

    In conjunction with the 20th HiPEAC Conference
    Barcelona, Spain
    January 20-21
    Website

  • german flag

    DASIP 2024

    In conjunction with the 19th HiPEAC Conference
    Munich, Germany
    January 17-19
    Website

  • french flag

    DASIP 2023

    In conjunction with the 18th HiPEAC Conference
    Toulouse, France
    January 16-18
    Website

  • hungarian flag

    DASIP 2022

    In conjunction with the 17th HiPEAC Conference
    Budapest, Hungary
    June 20-22
    Website

  • A laptop with four silouhetes in a split screen

    DASIP 2021

    In conjunction with the 16th HiPEAC Conference
    Virtual Conference, Online
    January 18-20
    Website

  • canadian flag

    DASIP 2019

    Polytechnique Montréal, Canada
    October 16-18
    Website

  • portuguese flag

    DASIP 2018

    University of Porto, Portugal
    October 10-12
    Website

  • german flag

    DASIP 2017

    Technical University of Dresden, Germany
    September 27-29

  • french flag

    DASIP 2016

    RISA/INRIA Rennes, France
    October 12-14

  • polish flag

    DASIP 2015

    AGH University of Science and Technology, Poland
    September 23-25

  • spanish flag

    DASIP 2014

    Technical University of Madrid, Spain
    October 8-10

  • italian flag

    DASIP 2013

    University of Cagliari, Italy
    October 8-10

  • german flag

    DASIP 2012

    Karlsruhe Institute of Technology, Germany
    October 23-25

  • finnish flag

    DASIP 2011

    Tampere University of Technology, Finland
    November 2-4

  • United-Kingdom's flag

    DASIP 2010

    University of Edinburgh, UK
    October 26-28

  • french flag

    DASIP 2009

    Sophia Antipolis, France
    September 22-24

  • belge flag

    DASIP 2008

    Brussels, Belgium
    November 24

  • french flag

    DASIP 2007

    Grenoble, France
    November 27-29

Sponsors

Zulip Logo, a stylised Z in a blue circle